Please register or login. There are 0 registered and 1233 anonymous users currently online. Current bandwidth usage: 326.30 kbit/s December 16 - 05:55am EST 
Hardware Analysis
Forums Product Prices

  Latest Topics 

More >>


  Intel's Pentium 4, a closer look 
  May 17, 2001, 12:00pm EDT 

SSE2 and Misc. Features

By: Sander Sassen

The Pentium 4 upgrades the P6 CPU SSE to SSE2, Streaming SIMD Extensions 2, with seventy-six SIMD instructions and enhancements to sixty-eight integer SIMD instructions. That makes 144 SIMD instructions to manage floating point, application and multimedia performance. From a programmer's perspective, the model for the new Pentium IV CPU is not that dissimilar to the MMX technology and SSE models in the Pentium II and III. The new SSE2 instructions add much more flexibility, as they allow SIMD computations to be performed on floating-point, integer, and packed integer data types in the MMX registers.

New SIMD instructions aim to do away with one of the major bottlenecks found in today's x86 CPUs: the x87 FPU, or floating-point unit. The performance of the x87 FPU is severely restricted by this aging standard. Improving performance would not be easy with its original design. Using SSE2 to bypass it completely circumvents the bottleneck. In effect, if Intel can find enough support among software developers and provide enough incentive to start using SSE2 for doing floating point operations, the Pentium IV's SSE2 FPU will be a lot faster than an equivalently clocked x87 FPU. This would deliver much better performance encoding or decoding video and audio streams, or in 3D-modelling and games.

Naturally, Intel's Pentium 4 CPU has many other new features, making it truly a next generation CPU. These were just some of the more compelling features. Others include an Arithmetic Logic Unit (ALU) that runs at twice core frequency. Since integer instructions execute at twice the speed of the rest of the processor, there is higher execution throughput and reduced execution latency. And the quad pumped 100 MHz System Bus is a split-transaction, deeply pipelined system bus that delivers up to three times the bandwidth of the PIII system bus. It uses 128-byte lines with 64-byte accesses, versus 32-byte lines. This provides a 3.2 GB/s bandwidth between the Pentium 4 processor and the memory controller, the highest bandwidth desktop system bus currently available.

1. Introduction
2. Clockspeed and Bandwidth
3. Pipelining and Performance
4. Pipelining and Performance Cont.
5. Branch Prediction
6. Branch Prediction Cont.
7. SSE2 and Misc. Features
8. Conclusion

Discuss This Article (2 Comments) - If you have any questions, comments or suggestions about the article and/or its contents please leave your comments here and we'll do our best to address any concerns.



  Related Articles 

A weekly newsletter featuring an editorial and a roundup of the latest articles, news and other interesting topics.

Please enter your email address below and click Subscribe.