SANTA CLARA, Calif., October 8, 2001 - Intel Corporation today announced its researchers have developed a new semiconductor packaging technology that will help the company build processors with more than 1 billion transistors that will be 10 times faster than the fastest processors today. The technology, called "Bumpless Build-Up Layer" or BBUL packaging, takes a completely different approach to packaging from the current practice of manufacturing the processor die separately and later bonding it to the package. Instead, BBUL "grows" the package around the silicon, resulting in thinner, higher-performance processors that consume less power.
Intel believes it can begin making BBUL packaging available for commercial products in the next five to six years.
"In order to deliver the applications that could once only be considered science fiction, we will need to create processors that are much more powerful than those we have today," said Dr. Gerald Marcyk, director of Intel's Components Research Lab. "The development of BBUL technology will allow us to deliver the performance of billion-transistor processors to computers users. It is something that current packaging technology just can't handle."
BBUL packaging is thinner and lighter than today's chip packaging options. It can also support multiple chips in the same package. The role of packaging is to "house" the processor die, supply it with electricity and act as the interface between the silicon and the rest of the computer system while protecting it from dirt and physical dangers. Intel uses various forms of packaging to help tailor its processors for specific applications, including using smaller, thinner packages for mobile PCs, or packages with built-in reliability and manageability features for servers. Packaging also plays a key role in delivering processor performance, since it takes data into and out of the silicon core at ever-faster speeds.
"If packaging technology does not keep up with the pace of silicon development, it will become a limiter to processor performance," Marcyk said. "Putting fast silicon into slow packages would be analogous to putting a Formula One engine on a bicycle and expecting it to run like a race car."
The first step in building high-density, super-fast processors is the design of very fast, very small transistors. In June, Intel scientists unveiled the world's fastest transistors, running at a blistering 1.5 Terahertz (1,500 Gigahertz), and featuring structures as thin as three atomic layers. The second step is the development of advanced lithography technology in order to print those transistors on a sliver of silicon. Intel has been leading the industry's effort to develop Extreme Ultraviolet (EUV) lithography, which will allow Intel to pack a billion transistors into a single processor. The third step is to develop a processor package that can handle the transistor density and speed of these future processors without slowing them down. This is the driving force behind BBUL technology research.
Today, silicon chips, such as the Intel Pentium 4 processor, are connected to their packaging via tiny balls of solder called "bumps." These bumps make the electrical and mechanical connections between the package and the chip. As the frequency in future processors increases exponentially, the performance of the bumps, the thickness of the packaging and the number of connection points become concerns.
BBUL packaging eliminates use of these solder bumps completely. Instead of attaching the silicon die to the package, the BBUL technique grows the package around the silicon. High-speed copper connections are used to connect the die to the different layers of the package. This approach reduces the thickness of the processor package and enables the processor to run at a lower voltage -- both key features for small, battery-operated devices such as mobile PCs or handheld devices.
Using BBUL packaging, Intel could also create multi-chip processors, such as server processors with two silicon cores and other supporting silicon chips embedded into one small, high-performance package. BBUL packaging technology could also offer a simple method to develop a "system-on-a-package" through the use of high-speed copper lines directly located above the different pieces of silicon. This would allow designers to more easily embed powerful computers into such everyday objects as a car's dashboard.
Intel Labs researchers will disclose the technical details of this new packaging technology Oct. 9 at the Advanced Metalization Conference in Montreal.
For more information on Intel packaging technology and other silicon research, visit Intel's Silicon Showcase at http://www.intel.com/research/silicon/