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  The next Pentium 4 processor, Prescott arrives 
  Feb 02, 2004, 07:30am EST 

Performance - Cache Bandwidth

By: Dan Mepham

Having explored latency, let's take a look at the cache bandwidth of the two processors.

Examining the read bandwidth, we see an expected result - similar bandwidths, save for the 8-16kB and 512-1024kB regions, where Prescotts larger caches prevent the data from being moved to the next level. On this chart, the actual bandwidth values for Prescott appear as marginally higher - this is simply due to the 4% clockspeed difference between the 3.20 GHz Prescott and 3.06 GHz Northwood we used for our testing.

The following tables summarize that the L1 and L2 read bandwidths of both processors are approximately equal (within a reasonable margin of measurement error).

We find the largely decreased write bandwidth of the Prescott core to be rather confusing. This 20% decrease in L1 and L2 write bandwidth is well outside a reasonable margin of measuring error, and we're at a bit of a loss to explain it.

1. Introduction
2. Caching In
3. Branching Off
4. Round 3, SSE Gets a Refresh
5. Intel's 2004 Roadmap, Sock-et to Me!
6. Incremental Improvements
7. Something Rotten in Santa Clara
8. Performance - Cache Latency
9. Performance - Cache Bandwidth
10. Performance - Cache Throughput
11. Performance - ScienceMark 2.0
12. Performance - Sandra & PCMark
13. Performance - PCMark & AquaMark
14. Performance - SPECviewperf
15. Summary
16. Appendix A - Benchmark Configuration

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