It’s early 1999 and Intel is actively promoting Rambus memory as the most scalable memory architecture for the future. All of the current and upcoming Intel chipsets are outfitted with support for this memory architecture and there’s heated discussions going on in many newsgroups, forums and through email about this move to a new memory architecture. Intel is blamed for forcing people to buy into this new technology, a technology that as some say, fails to deliver on its promises as initial benchmarks don’t show any substantial performance benefits. On top of that it has a rather steep price premium which doesn't help with the public appeal either; RDRAM is on average 5x more expensive than SDRAM.
During the course of 1999 and 2000, many websites, printed magazines and other press outlets seemed to take a stance against Rambus; they come up with all sorts of, often invalid, excuses to debunk Rambus’ performance claims, price, scalability and what not. A number of people looked at the issue from a broader perspective; I investigated the matter closely in a fairly lengthy article
about Rambus’ RDRAM, the RDRAM architecture and why it was much more scalable and offered better bandwidth than SDRAM technology, as well as taking a look at what motivated Intel to adopt Rambus’ RDRAM as the future memory architecture for Intel CPUs.
Despite having had many people, and that’s an understatement, question my findings in newsgroups, forums and also through email my answer remained the same; with faster CPUs will come the demand for more memory bandwidth and RDRAM looks to offer the most scalable solution. What many clearly did not see from my articles is that I looked upon the whole heated Rambus debate from an engineer’s perspective, regardless of price. I looked at both SDRAM and RDRAM and concluded that given the technical difficulties of producing ever faster SDRAM, RDRAM was the only architecture with enough scalability and bandwidth reserve to scale accordingly with higher clockspeed CPUs.
DDR was still in its infancy back then, but nevertheless many labeled it as the memory technology that will wipe the floor with RDRAM, despite the technical difficulties that are inherent to its design, mostly because DDR could be manufactured cheaply and thus wouldn't come with a price premium. These technical difficulties are apparent when looking at the 64-bit parallel architecture of DDR. From a signaling point of view it will be difficult to raise the performance beyond a certain point by raising the frequency and thus this puts the brakes on the scalability of the architecture. Rambus’ RDRAM has much better scalability as they’re not using a large parallel architecture but rather a serial protocol, which was designed from the ground up to be highly scalable both in frequency and bus width.
DDR is affected by the same technical difficulties that SDRAM was faced with two years ago, difficulties for which there’s no cut ‘n dried solution nor a simple fix that will make it a fast, scalable but above all affordable solution. In the next few pages we’ll be looking at the problems DDR is faced with and why Rambus’ RDRAM has become a faster, more scalable and above all cheaper solution for today's and tomorrow's PCs.