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  Intel's Core 2 Duo processors, leveling the playing field. 
  Jul 14, 2006, 09:30am EDT 

Core 2 Duo Internals

By: Sander Sassen

Before we fill a number of pages with graphs and benchmarks lets first take a closer look at some of the features that the Core 2 processor brings to the table. Apart from its unassuming exterior -it is similar to any other LGA-775 Intel processor that preceded it- there are quite a few things worth mentioning. Lets start with the manufacturing process; Conroe is manufactured using Intel 65-nm process and features an impressive 291-million transistors on a 143-mm^2 die. By contrast the previous top of the line Intel processor, the Pentium Extreme Edition 965, features two dies measuring 81-mm^2 each containing no less than 188-million transistors per die. So not only is Conroe physically smaller, it also has fewer transistors than the previous generation Intel processor.

More impressive however is the fact that Intel managed to drastically lower the power consumption and power requirements of these new processors. Did a PC featuring the Pentium Extreme Edition 965 have an idle power consumption of around 150-watts, a PC equipped with the same parts, but featuring the top of the line Core 2 Extreme X6800 processor just barely manages to consume 100-watts. That is a staggering 33% reduction in power consumption, which will result in a significantly reduced utilities bill at the end of the year. Even compared to AMD's Athlon 64 and Athlon 64 X2 processors the Core 2 processors fare well, offering similar power consumption but significantly better performance, hence better performance per watt, what more could you ask for?

Another tribute to the competence of the design team is the fact that despite not having an on-die memory controller the Core 2 processor has lower memory latency than AMD's much heralded on-die memory controller. Although the Core 2 processor uses the 128-bit DDR2 memory controller on Intel's 965 or 975X chipset the shared L2-cache between the two processors helps to keep all the cache to cache traffic off the FSB, freeing it up for memory access and other I/O. Other optimizations are put in place as well to reduce overhead, even simple ones such as only keeping one set of data that is needed by both cores, rather than two.

The fact that there is less traffic on the FSB helps keep the overhead low, hence Intel has not opted to bump the FSB speed up any further, it will remain at 1066Mhz for now. Intel will do this on the processors based on the same architecture that are dubbed Woodcrest which are meant for server use, but these have different requirements all together and might well run at near maximum bus capacity most of the time. Although the new Core 2 architecture is a data hungry one due to the short pipeline and its ability to process four instructions per clock cycle Intel's shared L2-cache alleviates much, if not all, of the bottleneck created there.

Last but not least the Core 2 architecture is a native dual core design, meaning that the two execution cores each have their own separate, 32K L1 instruction and data caches, but they share a common L2-cache that can be either 2MB or 4MB in size. As mentioned this cache is shared not through the FSB as it was with previous dual core processors but each execution core can allocate space in this L2-cache dynamically. This approach is clearly superior to the Pentium D's approach, where the two cores can communicate and share data only via the front-side bus and thus there is much more overhead on the FSB, reducing memory bandwidth and increasing memory latency and hence performance.

1. Introduction
2. Core 2 Duo Internals
3. Core 2 Duo Testing
4. Conclusion

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